Semiconductor devices have, until recently, been based on planar technology, which imposes constraint in terms of miniaturization. The development of nanotechnology and, in particular, the ability to produce nanowires has opened up new possibilities for designing semiconductor devices having improved properties and making novel devices which were not possible with planar technology.
The interest in memory circuits for the data storage applications has over the last couple of years shown a significant increase. The interest is arising primarily from the seemingly ever increasing demand for faster and more densely packed memories in combination with recent reports indicating that memory circuits based on nanotechnology are technologically achievable. Compared to the today most used non-volatile memories for handheld devices, flash memories, memory devices based on nanotechnology, such as single-electron devices, have the potential of offering extremely dense memories due to the nanoscale dimensions. Another advantage is very low power consumption due to the fact that only a very limited number of electrons are involved in the basic operations, which also can give very fast operation. The size of memory devices based on planar technology can not readily be reduced without various problems, such as increased contact resistance due to reduced size of contacts or poor current control due to reduced channel width.
European patent application EP 1 420 414 A1 discloses one example of a memory device based on nanotechnology with a footprint in the range of the smallest planar memory devices. This memory device includes a nanotube grown on a substrate such that one end of the nanotube is in contact with a source region of the substrate and the opposite end is in contact with a drain region whereby the nanotube forms an electron transport channel of the memory device. A memory cell that comprises an electron storing layer sandwiched between insulation layers is formed around the nanotube. The electron storage layer is either a homogenous layer or a porous layer containing nanodots filled with an electron storage material using chemical vapor deposition or sputtering. The flow of electrons through the nanotubes is controlled by a control gate formed around the memory cell.